1. Design and technology of film-resistors
Similar to thick-film circuits, film-resistors are realized by applying layers on substrate with correct electric parameters in LTCC circuits. Basically film-resistors can be sorted in two groups: surface mounted and inner, embedded resistors.
The surface resistors can be realized by thin-film or thick-film technology. At the produce of thin-film resistor the surface of co-fired glass-ceramic is polished, after it the resistive layer is evaporated in required shape. Another solution is to create resistors with thick-film technology on the unburnt surface of the substrate, then raw glass-ceramic substrates are co-fired.
Before printing embedded resistors the conductive layers are printed direct on the unburnt glass-ceramic sheets. Printing is usually screen-printing or stencil-printing. The raw glass-ceramic sheets are laminated after printing, and then pressed at the temperature of 70-85 °C.
By using thin-film resistors the prime costs are significantly higher (polish the surface). Sizes of thin-film resistors are more accurate, therefore these kind of resistors have higher precision.
The values of resistors on the LTCC substrate can be increased by laser trimming. To save place built-in substrate resistors are beneficial. If embedded resistors are fired their geometry is modified (an account of shrinkage) and also the material of resistor and the glass-ceramic react with each other. This phenomena leads to the increase of the value of film-resistance. To get this problem right protective coating pastes were developed, which prevent the reaction between resistive paste and glass-ceramic. Present design softwares can only plan the resistors in state before firing; simulator softwares which can simulate previously the condition after firing are under expansion.
1.1. Ruthenium-dioxide
Nowadays the most often used resistive paste in LTCC technology is RuO2. The structure of ruthenium does not change up to the temperature of 1025 °C and it is thermodynamically stable up to 1400 °C, however at higher temperature the structure of material basically changes, molecules fall apart, it can be used as resistor.
At the production of ruthenium-dioxide ruthenium or ruthenium-chloride are heated in oxygen-rich environment. The product is RuO2 dust the main parameters are shown the table below.
Main parameters of ruthenium-dioxide
|
Ruthenium-dioxide |
|
|
Density |
7,06; g/cm3 |
|
Mol density |
18,85; cm3 |
|
Thermal expansion (20-300 C°) |
6,32; ppm/C° |
|
Specific resistance (25 C°-on) |
4 * 10-5; ohm |
|
Temperature coefficient |
5 * 103; ppm/C° |
|
Molecula-size |
10-100; nm |
Specific resistance of metallic ruthenium (RuO2: 4·10-5 ohm; Ru: 7.2·10-6 ohm) and in volume (1 mol RuO2: 19 cm3; 1 mol Ru: 8.2 cm3) seriously differs from ruthenium-dioxide. Forasmuch as ruthenium arises it modifies the electrical and physical parameters of resistor layer. The value of resistors and the rate of shrinkage decreased and do not suit the previous calculation (their values grow) and due to less shrinkage and so the inner stress they are not stabile mechanically.
If the substrate is co-fired in oxygen-rich environment the ruthenium loses its oxides at the temperature of 250 °C, and regain them back at only higher temperature as 400 °C. The reason of this phenomenon is the organic adhesives and solvents evaporate from the paste and glass-ceramic. In the midst of evaporating reduce gases arise and extract oxygen from the environment. Figure below shows the phases during co-firing (substrate is examined by electron diffraction device intermittently at certain temperatures).
Run of ruthenium-oxides at different temperatures
As the adhesives evaporate, the lack of oxygen ceases so thus RuO2 arise again. According the organic adhesives does not evaporate fully metallic ruthenium particles remain in substrate (RuO2 + C → Ru + CO2) which make the resistive layer mechanically and electric instable.
On figure below can be seen the model showing the conformation of resistor made of ruthenium-dioxide / borosilicate glass mixture before burning, and the curve on the other figure show the change of sheet resistance of paste hanging on contents of ruthenium-dioxide.
Ruthenium-dioxide - glass conformation before burning
1.2. Most important demands putting up for resistive layers
The parameters of raw glass-ceramic substrate (electric, physical, mechanical and chemical) depend on the sort of printing process, and drying and firing profile.
The following requirements are put up for resistive layers:
- Stick well to substrate and conductive layer,
- to have large sheet resistance,
- to have low temperature coefficient,
- film-technology have to be simple and fully controllable,
- values can be easy to trim.
The value and thermal subservience of resistive layers applied in LTCC technology beside the same paste content and technological steps is widely influenced by parameters below:
- Dross in the substrate or on the surface of it,
- morphology of substrate’s surface,
- cleanness of functional- and glass-phase,
- stoichiometric content of functional phase,
- size, shape and distribution of metal- resp. metal-oxide particles creating paste,
- softening point and recrystallize temperature of glass-phase,
- viscosity of organic solvents.
Because of the enumeration above the creation and production technology of LTCC circuits require the verifying of these parameters.
It is important to mention that the base materials (substrates and pastes) have to be used during warranty period and comply with the suggested storage environment. These requirements usually need careful attention and expensive machines, however the reproducible quality of the manufactured circuits can be guaranteed only this way.
1.3. Design of embedded film-resistors in LTCC technology
The sizing of embedded resistors is a serious and complicated engineering task. The technology requires, that the material of resistive paste, tolerance of sheet resistance, trimmability, TCE, etc. has to be known before topological planning. Therefore the planning of every buried or surface resistor needs minimum two distinct planning steps: first the restive paste has to be chosen, and then the best topological plan has to be designed from the paste with optimal sheet resistance, observing the design rules.
The modern thick-film and LTCC design softwares have built-in paste database and statistical data make easier the resistor-calculating and simulations. Figure below shows the field of paste database of HYDE software’s LTCC module, that is also used by us.
Paste database of HYDE thick-film and LTCC circuit design software
General geometric parameters (like average length, width, thickness, relationships with proposed and real sizes, etc.) correlate with basic electrical resistance parameters like the value of resistance, temperature coefficient, power and the distribution of these parameters.
After choosing a paste with the adequate sheet resistance, the value of the resistor is determined by the shape of the composition carried up (the width, the length and the thickness). In general, the paste properties are specified for a layer-thickness of 18-25 μm. If this thickness is kept, the value of the resistance can be estimated with certain tolerance after co-firing. The alternation of thickness is also possible, nevertheless in case of too thin (<15 μm) layers the resistive component react with glass-ceramic substrate during co-firing, on the other hand too thick (>40 μm) resistive layer can cause the fragmentation of burned layer. Previous case decreases the effective thickness of resistive layer thus the resistance value increases and stability decreases which can lead to split.
In general, in the course of planning the resistance values are designed below their final desired value of about 40-70%, because increasing the value of the film resistance is much easier than decreasing it with subsequent adjustment. It is important to consider the respects below or rather give them in specification:
- Value of resistance,
- tolerance,
- max. power,
- max. voltage,
- TCE,
- noise,
- parasite effects (frequency characteristics),
- stability.
The value of the buried resistance can be calculated with scheme (1): 
where „
” is the specific resistance [ohm·mm]; „l” is the length of the paste, [mm]; „d” is the paste width, [mm]; „v” is the paste thickness and 
is the sheet resistance.
Another important parameter of the film resistors is the thermal coefficient (TCE):
1/C
where „R” is the resistance value at 25ËšC, „dR” is the difference between the resistance values measured at the highest and the lowest temperature, and „dT” is the difference of the measuring temperatures. For the expected correct functioning of the LTCC substrates, frequently it is necessary a small or a given value of TCE in the R network. The TCE value of the film resistances are determined by the heat-dilatation of the layer and substrate.
The dependence of the resistance value by the potential is expressed with potential factor (VK):
1/V
where „R” is the resistance value at a given potential, „dR” is the difference between the resistance values measured at the highest and the lowest potential, and „dU” is the difference of the measuring potentials.
One important functional parameter is the stability of the resistors, which gives the fluctuation of the resistance with time (%). The dependence of this factor with the time is nonlinear, because this fluctuation caused by the oxidation and the changes in the structure of the layers.
One characteristic of the layer resistors is the power density (power per surface unit), what determines the temperature of the layer for a given substrate, then it can decisively influence the stability of the resistors. If the power parameters are known, the longer (l) and shortest (d) size of the resistors are determined with schemes below:
; mm
; mm
; mm
where „d” is the shorter size of the resistor, „l” is the longer size, „P” is the dissipated power of the resistor at environment temperature, „Pf” is the specific power, „Ri” is the unadjusted value of the resistance, „Rn”=Râ–? is the sheet resistance, „q” is the surface power density at the maximal environment temperature.
If the values of l or d are below the technical minimum (in case of screen printing this minimum is 200 μm), these values have to be increased at least to this minimum, and after it the other parameter too. For size greater than 5 mm, the morphology of the substrate is important too. The dimensions of the resistor are optimal, if l/d is near 1, and the shortest size is between 1 mm and 3 mm. The minimal dimensions depend on thermal considerations and the carrying-up technology of the layers.
Design softwares support many topologies regarding the geometric shape of resistors. Geometric shape used in circuit can be determined by taking notice the electronic and physical parameters. Next figure show the filmresistor- topologies supported by Graffy-HYDE design software.
Filmresistor-topologies supported by Graffy-HYDE design sofware
The geometric forms of resistors presented above can be completed with heat-compensated bonding which have to be created at the planning of conductive lines. Figure below represents this type of bonding in case of simple rectangular film-resistors.
Heat-compensated bonding applied at buried resistors
It is practical to use simple structures to decrease parasite effects if it is possible. The simplest shape is rectangle form. In designing aspect many rules have to be observed in this case to. Some of these rules are presented below without the demand of completeness:
- The overlap of conductive and resistive layer applied by screen-printing has to be 125…250 μm long
- The value of resistive layers is changing during co-firing and the reason of it is the glass in LTCC substrate reacts with resistive paste. This reaction alters the conductivity, sheet resistance and thermal expansion of resistive layer contacting with glass.
- If the length and width of a rectangle resistor is planned l/d has to be kept between 0.2 and 5. In case of the range can be kept it is practical to use cylindrical or meander geometric form. 20-30 times higher value of sheet resistance can be approached by using trimmed cylindrical resistor.
- Loadability of resistor is commensurable to its size, but too large appropriation of place can be at the expense of buried components in the same layer.
The deviation of imprint-thickness can not be avoided in case of screen-printing of resistive layers. It depends on the thickness of layer, mesh number of the texture, thickness of emulsion, printing speed, squeegee pressure and press-angle. The thickness is influenced by the distance between bolting-cloth and substrate too. Figure shows the change of resistance in function of a few parameters.
Change of sheet resistance in the function of the parameters
a) change of resistance in the function of bolting-cloth – substrate distance; b) change of thickness of sheet resistance in function of printing speed; c) change of resistance in the function of press-angle of squeegee; d) change of resistance in function of squeegee pressure; e) change of resistance in the function of layer thickness (DuPont 2031 paste); f) change of temperature coefficient in the function of layer thickness (DuPont 2031 paste)
Figure a) shows the change of resistance in the function of bolting-cloth – substrate distance. The more is the bolting-cloth impressed upon the substrate the thinner composes the paste on the substrate and the sheet resistance is thinner which causes higher resistance. Optimal distance is between 0.7...1 mm.
Figure b) shows the impact of printing speed on the thickness of sheet resistance. Curve 1 represents the impact of a soft squeegee, curve 2 the impact of a sharp squeegee.
Figure c) illustrates effect of squeegee press-angle on resistance. 45° is recommended in LTCC technology.
Figure d) shows the relation between squeegee pressure and sheet resistance in case of sharp and blunt squeegee. The print of sharp squeegee can calculated easier.
Figure e) and f) show the function of layer thickness-resistance and layer thickness-TCE. The manufacturer measured the values in three points. On the strength of this the change of parameters above can be deduced in case of different layer thickness.
Against precision of topological planning the deviation of sheet resistance is high in LTCC technology. The reason of it is the changeable environmental parameters, on the other hand the uncertainty of film-printing known from thick-film technology. Before the manufacture of every circuit it is worth to make a pre-production to determine deviation statistics. The real production is easily held by using this statistics and with applying minor modifications.
1.4. Parasite-effects of layer resistances
In the course of designing layer resistance parasite-effects have to be taken into account. Figure below shows the mathematical substitute model of film resistor. Two modules (L2;C2) represent the film resitors and conductive layers contact, Middle modules (L1,C1) represent the resistors, C3 capacitor represent dielectric effect.
Mathematical model of buried film resistors
Parasite inductivity and capacitance
At high frequencies (above 10 MHz) the parasite inductivity has to be taken into consideration. The inductivity of the film resistors can be calculated by the following formula:
, H
where μ0= 4π · 10-7; H/m, is the vacuum permeability, „l” is the length of the film resistor in mm-s, and „d” is the width of the film resistor.
The l/d ratio does not change by reducing the dimensions, but the inductivity decreases proportionally. Reducing the length or enlarging the width increases the neglected terms of the series. In case of top-hat and meander structures the mutual inductance has to be taken into account too.
The capacitance of an isolated straight film resistor is very little. It grows when the carrier has high relative permittivity. If there are many film resistors (or conductors) side by side not only the adjacent lines’ capacitance has to be taken into consideration.
Terminals of the film resistors
The resistor terminals affect the resistance principally in two ways: the current distribution at the overlapped area becomes inhomogeneous and the transition between the two layers have considerable resistance.
If the inhomogeneous distribution of the current is taken into account the resistance of the terminals can be calculated:
where „Rn”=Râ–? is the sheet resistance in ohm; „rk” is the resistance of the layer transition in ohm·mm2; „v” is the thickness of the imprint in μm; „d” is the width of the transition in μm.
1.5. Temperature dependance of film resistors
The spread of buried film-resistors is the low temperature coefficient (TCE) of resistors. TCE is defined by the change of resistance in relation of original value of resistor in a given range of temperature in terms of ppm/°C. This formula can applied to calculate TCE:
TCE= ΔR/(R25•ΔT)•106; ppm/°C,
where ΔR is the change of resistance as a result of ΔT temperature-change and it is presented by ambient temperature R25=25 °C.
If TCE is examined in wider range of temperature it turned out to be negative at low temperature and positive at high temperature. The point of extreme depends on specific resistance and some cases are represented by next figure.
300 Ohm; 1 Kohm and 20 Kohm layer resistance in function of temperature
TCE of layer resistance is between ±100 and ±300 ppm/°C irrespectively of the real resistance.
Resistors are qualified by measuring their specific resistance and temperature coefficient. These parameters are affected by the material of wiring and firing diagram that is why these parameters in datasheet are available only if the technological parameters are given.
2. Buried capacitors in LTCC substrate
Capacitance of plane capacitor can be calculated by this formula:
F
where e0 = 8,84·10-12 C2/N·m2 is the vacuum permittivity; „er” is the permittivity of the dielectric, C2/N·m2; „d” is the thickness of dielectric, mm ; „A” is the surface of capacitor, mm2.
Many parameters have to be considered if a capacitor is planned.
Geometric parameters of buried capacitors:
- Thickness of dielectric,
- surface of armors.
Electric parameters of buried capacitors:
- Permittivity,
- capacitance,
- dissipation factor,
- insulation strength,
- insulation resistance,
- temperature coefficient of capacitance.
The dielectric material of buried capacitors is usually BaTiO3, BaTiO3-epoxy, polymer-ceramic, epoxy-glass. Many types of paste are offered by manufacturer for creating dielectric layers. Buried plane capacitors are made up of three layers: one dielectric layer and two armors. The armor and dielectric layers are applied by screen-printing and after drying and pressing they are co-fired with the substrate.
Design of buried capacitors and the model of it
a) Capacitor designing solutions; b) Mathematical model of real capacitor
3. Buried inductivity in LTCC subtrates
Buried inductivities are still rarely used in LTCC technology (10% of buried passive elements), because only low inductance (once or twice 10 μH) can be realized this way. These elements need very fine pattern details (25-50 μm line thickness), small diameter of via-passages (25-50 μm) and thin insulator layer between conductive lines. It can be created by finer technology than screen-printing (i.e.: special paste applicator and drawer machines and photolithography).
In most cases buried inductivities are built in radiofrequency devices but it can be realized in one layer because of the parameters of material. 3D structures can be realized in LTCC substrate, figure below shows a possible structure.
Three-dimensional inductivity structure in LTCC substrate
where „lw” is line width; „wd” is the size of window; „l” is the height of the structure; „h” is the distance from the bottom of the substrate.
These structures have better quality than larger inductivity in one layer, but it is important to place power-conductor layers far enough from buried inductivity to minimize parasite effects. At high frequency applications have to be considered skin effect.
Buried LTCC inductivities are realized usually from low resistance silver paste. (If these were realized traditionally the losses were too high in most application). The produce of tree dimension buried inductivity can be traced on figure, the figure follow-up this shows the implementations and mathematical model of buried inductivity in a circuit.
Manufacturing technology of buried inductivity
Inductivities in LTCC technology
a) inductivity designing solutions in LTCC circuits; b) realized three-dimensional inductivities in one layer; c) mathematical model of real inductivity; d) inductance in the function of frequency